101 lines
3.8 KiB
C
101 lines
3.8 KiB
C
/******************************************************************************
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*
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* $Id$
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*
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* Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH
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*
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* This file is part of the IgH EtherCAT Master.
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*
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* The IgH EtherCAT Master is free software; you can redistribute it
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* and/or modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* The IgH EtherCAT Master is distributed in the hope that it will be
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* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the IgH EtherCAT Master; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* The right to use EtherCAT Technology is granted and comes free of
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* charge under condition of compatibility of product made by
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* Licensee. People intending to distribute/sell products based on the
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* code, have to sign an agreement to guarantee that products using
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* software based on IgH EtherCAT master stay compatible with the actual
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* EtherCAT specification (which are released themselves as an open
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* standard) as the (only) precondition to have the right to use EtherCAT
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* Technology, IP and trade marks.
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*
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*****************************************************************************/
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/** \file
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* EtherCAT FMMU configuration methods.
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*/
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/*****************************************************************************/
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#include "globals.h"
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#include "slave_config.h"
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#include "master.h"
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#include "fmmu_config.h"
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/*****************************************************************************/
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/** FMMU configuration constructor.
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*
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* Inits an FMMU configuration, sets the logical start address and adds the
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* process data size for the mapped Pdos of the given direction to the domain
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* data size.
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*/
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void ec_fmmu_config_init(
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ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */
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ec_slave_config_t *sc, /**< EtherCAT slave configuration. */
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ec_domain_t *domain, /**< EtherCAT domain. */
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ec_direction_t dir /**< Pdo direction. */
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)
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{
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fmmu->sc = sc;
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fmmu->dir = dir;
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fmmu->logical_start_address = domain->data_size;
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fmmu->data_size = ec_pdo_list_total_size(&sc->pdos[dir]);
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ec_domain_add_fmmu_config(domain, fmmu);
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}
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/*****************************************************************************/
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/** Initializes an FMMU configuration page.
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*
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* The referenced memory (\a data) must be at least EC_FMMU_PAGE_SIZE bytes.
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*/
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void ec_fmmu_config_page(
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const ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */
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const ec_sync_t *sync, /**< Sync manager. */
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uint8_t *data /**> Configuration page memory. */
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)
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{
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if (fmmu->sc->master->debug_level) {
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EC_DBG("FMMU: LogAddr 0x%08X, Size %3i, PhysAddr 0x%04X, Dir %s\n",
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fmmu->logical_start_address, fmmu->data_size,
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sync->physical_start_address,
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(sync->control_register & 0x04) ? "out" : "in");
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}
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EC_WRITE_U32(data, fmmu->logical_start_address);
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EC_WRITE_U16(data + 4, fmmu->data_size); // size of fmmu
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EC_WRITE_U8 (data + 6, 0x00); // logical start bit
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EC_WRITE_U8 (data + 7, 0x07); // logical end bit
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EC_WRITE_U16(data + 8, sync->physical_start_address);
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EC_WRITE_U8 (data + 10, 0x00); // physical start bit
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EC_WRITE_U8 (data + 11, (sync->control_register & 0x04) ? 0x02 : 0x01);
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EC_WRITE_U16(data + 12, 0x0001); // enable
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EC_WRITE_U16(data + 14, 0x0000); // reserved
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}
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/*****************************************************************************/
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