Some more documentation...
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@ -603,7 +603,7 @@ section~\ref{sec:cyclic}).
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.8\textwidth]{images/app-config}
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\caption{Master configuration structures}
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\caption{Master Configuration}
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\label{fig:app-config}
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\end{figure}
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@ -658,26 +658,12 @@ Section~\ref{sec:concurrency} gives an example, of how to implement this.
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\chapter{Ethernet Devices}
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\label{sec:devices}
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% Device Interface
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% Device Modules
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% Network Driver Basics
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% EtherCAT Network Drivers
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% Device Selection
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% The Device Interface
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% Patching Network Drivers
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The EtherCAT protocol is based on the Ethernet standard, so the master relies
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on standard Ethernet hardware to communicate with the bus.
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The EtherCAT protocol is based on the Ethernet standard, so a master relies on
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standard Ethernet hardware to communicate with the bus.
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The term \textit{device} is used as a synonym for Ethernet network interface
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hardware. There are device driver modules that handle Ethernet hardware, which
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the master can use to connect to an EtherCAT bus.
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Section~\ref{sec:networkdrivers} offers an overview of general Linux
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network driver modules, while section~\ref{sec:requirements} will show
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the requirements to an EtherCAT-enabled network driver. Finally,
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sections~\ref{sec:seldev} to~\ref{sec:patching} show how to fulfill
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these requirements and implement such a driver module.
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a master can use to connect to an EtherCAT bus.
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%------------------------------------------------------------------------------
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@ -725,7 +711,7 @@ by reading the device's interrupt register. For example, if the flag
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for received frames is set, frame data has to be copied from hardware
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to kernel memory and passed to the network stack.
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\paragraph{The \lstinline+net_device+ structure}
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\paragraph{The \lstinline+net_device+ Structure}
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\index{net\_device}
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The driver registers a \lstinline+net_device+ structure for each device to
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@ -770,7 +756,7 @@ error happened, the appropriate counter in this structure has to be increased.
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The actual registration is done with the \lstinline+register_netdev()+ call,
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unregistering is done with \lstinline+unregister_netdev()+.
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\paragraph{The netif Interface}
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\paragraph{The \lstinline+netif+ Interface}
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\index{netif}
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All other communication in the direction interface $\to$ network stack is done
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@ -814,7 +800,7 @@ network driver.
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%------------------------------------------------------------------------------
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\section{EtherCAT Device Drivers}
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\label{sec:requirements}
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\label{sec:ethercatdrivers}
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There are a few requirements for Ethernet network devices to function as
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EtherCAT devices, when connected to an EtherCAT bus.
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@ -915,7 +901,7 @@ sysconfig file (see section~\ref{sec:sysconfig}).
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%------------------------------------------------------------------------------
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\section{The Device Interface}
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\section{EtherCAT Device Interface}
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\label{sec:ecdev}
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\index{Device interface}
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@ -1370,8 +1356,8 @@ monitored. If a slave is not in the state it supposed to be, the slave is
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(re-)configured.
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\item[Request handling] Requests (either originating from the application or
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from external sources) are handled. This can be SII accesses, Sdo accesses,
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etc.
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from external sources) are handled. A request is a job that the master shall
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process asynchronously, for example an SII access, Sdo access, or similar.
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\end{description}
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@ -1415,23 +1401,14 @@ image memory.
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State change FSM (see section~\ref{sec:fsm-change}) to enable mailbox
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communication and read the Pdo configuration via CoE.
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\item[Pdos] The Pdos are read via CoE (if supported) using the Pdo FSM (see
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section~\ref{sec:fsm-pdo}). If this is successful, the Pdo information from
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the SII (if any) is overwritten.
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\item[Pdos] The Pdos are read via CoE (if supported) using the Pdo Reading FSM
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(see section~\ref{sec:fsm-pdo}). If this is successful, the Pdo information
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from the SII (if any) is overwritten.
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\end{description}
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%------------------------------------------------------------------------------
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% SII
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% Pdo assign/mapping
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% Slave configuration
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% State change
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% Pdo assign/mapping
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% CoE upload/download/information
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%------------------------------------------------------------------------------
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\section{The Slave Configuration State Machine}
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\label{sec:fsm-conf}
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\index{FSM!Slave Configuration}
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@ -1499,68 +1476,41 @@ in \cite[section~6.4.1]{alspec}.
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.9\textwidth]{images/fsm-change} % FIXME
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\includegraphics[width=.6\textwidth]{graphs/fsm_change}
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\caption{Transition Diagram of the State Change State Machine}
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\label{fig:fsm-change}
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\end{figure}
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% FIXME
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\begin{description}
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\item[START] The beginning state, where a datagram with the state
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change command is written to the slave's ``AL Control Request''
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attribute. Nothing can fail. $\rightarrow$~CHECK
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\item[CHECK] After the state change datagram has been sent, the ``AL
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Control Response'' attribute is queried with a second datagram.
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$\rightarrow$~STATUS
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\item[Start] The new application-layer state is requested via the ``AL Control
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Request'' register (see ~\cite[section 5.3.1]{alspec}).
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\item[STATUS] The read memory contents are evaluated: While the
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parameter \textit{State} still contains the old slave state, the
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slave is busy with reacting on the state change command. In this
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case, the attribute has to be queried again.
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$\rightarrow$~STATUS
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\item[Check for Response] Some slave need some time to respond to an AL state
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change command, and do not respond for some time. For this case, the command
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is issued again, until it is acknowledged.
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In case of success, the \textit{State} parameter contains the new
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state and the \textit{Change} bit is cleared. The slave is in the
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requested state. $\rightarrow$~END
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\item[Check AL Status] If the AL State change datagram was acknowledged, the
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``AL Control Response'' register (see~\cite[section 5.3.2]{alspec}) must be
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read out until the slave changes the AL state.
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If the slave can not process the state change, the \textit{Change}
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bit is set: Now the master tries to get the reason for this by
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querying the \textit{AL Status Code} parameter.
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$\rightarrow$~CODE
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\item[AL Status Code] If the slave refused the state change command, the
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reason can be read from the ``AL Status Code'' field in the ``AL State
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Changed'' registers (see~\cite[section 5.3.3]{alspec}).
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\item[END] If the state machine ends in this state, the slave's state
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change has been successful.
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\item[Acknowledge State] If the state change was not successful, the master
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has to acknowledge the old state by writing to the ``AL Control request''
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register again.
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\item[CODE] The status code query has been sent. Reading the
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\textit{AL Status Code} might fail, because not all slaves support
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this parameter. Anyway, the master has to acknowledge the state
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change error by writing the current slave state to the ``AL Control
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Request'' attribute with the \textit{Acknowledge} bit set.
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$\rightarrow$~ACK
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\item[ACK] After that, the ``AL Control Response'' attribute is
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queried for the state of the acknowledgement.
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$\rightarrow$~CHECK ACK
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\item[CHECK ACK] If the acknowledgement has been accepted by the
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slave, the old state is kept. Still, the state change was
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unsuccessful. $\rightarrow$~ERROR
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If the acknowledgement is ignored by the slave, a timeout happens.
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In any case, the overall state change was unsuccessful.
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$\rightarrow$~ERROR
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If there is still now response from the slave, but the timer did not
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run out yet, the slave's ``AL Control Response'' attribute is
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queried again. $\rightarrow$~CHECK ACK
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\item[ERROR] If the state machine ends in this state, the slave's
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state change was unsuccessful.
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\item[Check Acknowledge] After sending the acknowledge command, it has to read
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out the ``AL Control Response'' register again.
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\end{description}
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The ``start\_ack'' state is a shortcut in the state machine for the case, that
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the master wants to acknowledge a spontaneous AL state change, that was not
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requested.
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%------------------------------------------------------------------------------
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\section{The SII State Machine}
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@ -1573,65 +1523,106 @@ Slave Information Interface described in \cite[section~6.4]{dlspec}.
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.9\textwidth]{images/fsm-sii} % FIXME
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\includegraphics[width=.5\textwidth]{graphs/fsm_sii}
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\caption{Transition Diagram of the SII State Machine}
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\label{fig:fsm-sii}
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\end{figure}
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% FIXME
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This is how the reading part of the state machine works:
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\begin{description}
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\item[READ\_START] The beginning state for reading access, where the
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read request and the requested address are written to the SII
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attribute. Nothing can fail up to now.
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$\rightarrow$~READ\_CHECK
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\item[READ\_CHECK] When the SII read request has been sent
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successfully, a timer is started. A check/fetch datagram is issued,
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that reads out the SII attribute for state and data.
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$\rightarrow$~READ\_FETCH
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\item[Start Reading] The read request and the requested word address are
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written to the SII attribute.
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\item[READ\_FETCH] Upon reception of the check/fetch datagram, the
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\textit{Read Operation} and \textit{Busy} parameters are checked:
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\begin{itemize}
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\item If the slave is still busy with fetching E$^2$PROM data into
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the interface, the timer is checked. If it timed out, the reading
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is aborted ($\rightarrow$~ERROR), if not, the check/fetch datagram
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is issued again. $\rightarrow$~READ\_FETCH
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\item[Check Read Command] If the SII read request command has been
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acknowledged, a timer is started. A datagram is issued, that reads out the SII
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attribute for state and data.
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\item[Fetch Data] If the read operation is still busy (the SII is usually
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implemented as an E$^2$PROM), the state is read again. Otherwise the data are
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copied from the datagram.
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\item If the slave is ready with reading data, these are copied from
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the datagram and the read cycle is completed.
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$\rightarrow$~END
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\end{itemize}
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\end{description}
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The write access states behave nearly the same:
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The writing part works nearly similar:
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\begin{description}
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\item[WRITE\_START] The beginning state for writing access,
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respectively. A write request, the target address and the data word
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are written to the SII attribute. Nothing can fail.
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$\rightarrow$~WRITE\_CHECK
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\item[WRITE\_CHECK] When the SII write request has been sent
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successfully, the timer is started. A check datagram is issued, that
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reads out the SII attribute for the state of the write operation.
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$\rightarrow$~WRITE\_CHECK2
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\item[Start Writing] A write request, the target address and the data word are
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written to the SII attribute.
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\item[Check Write Command] If the SII write request command has been
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acknowledged, a timer is started. A datagram is issued, that reads out the SII
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attribute for the state of the write operation.
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\item[Wait while Busy] If the write operation is still busy (determined by a
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minimum wait time and the state of the busy flag), the state machine remains in
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this state to avoid that another write operation is issued too early.
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\item[WRITE\_CHECK2] Upon reception of the check datagram, the
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\textit{Write Operation} and \textit{Busy} parameters are checked:
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\begin{itemize}
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\item If the slave is still busy with writing E$^2$PROM data, the
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timer is checked. If it timed out, the operation is aborted
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($\rightarrow$~ERROR), if not, the check datagram is issued again.
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$\rightarrow$~WRITE\_CHECK2
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\item If the slave is ready with writing data, the write cycle is
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completed. $\rightarrow$~END
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\end{itemize}
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\end{description}
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%------------------------------------------------------------------------------
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\section{The Pdo State Machines}
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\label{sec:fsm-pdo}
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\index{FSM!Pdo}
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The Pdo state machines are a set of state machines that read or write the Pdo
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assignment and the Pdo mapping via the ``CoE Communication Area'' described in
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\cite[section 5.6.7.4]{alspec}. For the object access, the
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CANopen-over-EtherCAT access primitives are used (see
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section~\ref{sec:coeimp}), so the slave must support the CoE mailbox protocol.
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\paragraph{Pdo Reading FSM} This state machine (fig.~\ref{fig:fsm-pdo-read})
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has the purpose to read the complete Pdo configuration of a slave. It reads
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the Pdo assignment for each Sync Manager and uses the Pdo Entry Reading FSM
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(fig.~\ref{fig:fsm_pdo_entry_read}) to read the mapping for each assigned Pdo.
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.4\textwidth]{graphs/fsm_pdo_read}
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\caption{Transition Diagram of the Pdo Reading State Machine}
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\label{fig:fsm-pdo-read}
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\end{figure}
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Basically it reads the every Sync manager's Pdo assignment Sdo's
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(\lstinline+0x1C1x+) number of elements to determine the number of assigned
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Pdos for this sync manager and then reads out the subindices of the Sdo to get
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the assigned Pdo's indices. When a Pdo index is read, the Pdo Entry Reading
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FSM is executed to read the Pdo's mapped Pdo entries.
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\paragraph{Pdo Entry Reading FSM} This state machine
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(fig.~\ref{fig:fsm_pdo_entry_reading}) reads the Pdo mapping (the Pdo entries)
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of a Pdo. It reads the respective mapping Sdo (\lstinline+0x1600+ -
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\lstinline+0x17ff+, or \lstinline+0x1a00+ - \lstinline+0x1bff+) for the given
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Pdo by reading first the subindex zero (number of elements) to determine the
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number of mapped Pdo entries. After that, each subindex is read to get the
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mapped Pdo entry index, subindex and bit size.
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.4\textwidth]{graphs/fsm_pdo_entry_read}
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\caption{Transition Diagram of the Pdo Entry Reading State Machine}
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\label{fig:fsm-pdo-read}
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\end{figure}
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.9\textwidth]{graphs/fsm_pdo_conf}
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\caption{Transition Diagram of the Pdo Configuration State Machine}
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\label{fig:fsm-pdo-read}
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\end{figure}
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=.4\textwidth]{graphs/fsm_pdo_entry_conf}
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\caption{Transition Diagram of the Pdo Entry Configuration State Machine}
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\label{fig:fsm-pdo-read}
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\end{figure}
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%------------------------------------------------------------------------------
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\chapter{Mailbox Protocol Implementations}
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\index{Mailbox}
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@ -1807,6 +1798,14 @@ The CANopen-over-EtherCAT protocol \cite[section~5.6]{alspec} is used to
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configure slaves and exchange data objects on application level.
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% FIXME
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%
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% Download / Upload
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% Expedited / Normal
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% Segmentung
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% Sdo Info Services
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%
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\ldots
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\paragraph{Sdo Download State Machine}
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@ -1874,28 +1873,27 @@ in figure~\ref{fig:fsm-coedown}.
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% FIXME
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For the master runs as a kernel module, accessing it is natively
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limited to analyzing Syslog messages and controlling using modutils.
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For the master runs as a kernel module, accessing it is natively limited to
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analyzing Syslog messages and controlling using modutils.
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It is necessary to implement further interfaces, that make it easier
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to access the master from user space and allow a finer influence. It
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should be possible to view and to change special parameters at runtime.
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It is necessary to implement further interfaces, that make it easier to access
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the master from user space and allow a finer influence. It should be possible
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to view and to change special parameters at runtime.
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Bus visualization is a second point: For development and debugging
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purposes it would be nice, if one could show the connected slaves with
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a single command.
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Bus visualization is a second point: For development and debugging purposes it
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would be nice, if one could show the connected slaves with a single command.
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Another aspect is automatic startup and configuration. If the master
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is to be integrated into a running system, it must be able to
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automatically start with a persistent configuration.
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Another aspect is automatic startup and configuration. If the master is to be
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integrated into a running system, it must be able to automatically start with
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a persistent configuration.
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A last thing is monitoring EtherCAT communication. For debugging
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purposes, there had to be a way to analyze EtherCAT datagrams. The
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best way would be with a popular network analyzer, like Wireshark
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\cite{wireshark} (the former Ethereal) or others.
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A last thing is monitoring EtherCAT communication. For debugging purposes,
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there had to be a way to analyze EtherCAT datagrams. The best way would be
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with a popular network analyzer, like Wireshark \cite{wireshark} (the former
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Ethereal) or others.
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This section covers all those points and introduces the interfaces and
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tools to make all that possible.
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This section covers all those points and introduces the interfaces and tools
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to make all that possible.
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%------------------------------------------------------------------------------
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@ -5,11 +5,13 @@
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#-----------------------------------------------------------------------------
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GRAPHS := \
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fsm_change \
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fsm_master \
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fsm_pdo_conf \
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fsm_pdo_read \
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fsm_pdo_entry_conf \
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fsm_pdo_entry_read \
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fsm_pdo_read \
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fsm_sii \
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fsm_slave_conf \
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fsm_slave_scan
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|
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@ -0,0 +1,34 @@
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/* $Id$ */
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digraph change {
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start [fontname="Helvetica"]
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start -> check [weight=5]
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check [fontname="Helvetica"]
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check -> status [weight=5]
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check -> error [fontname="Helvetica", label="Response\ntimeout"]
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status [fontname="Helvetica"]
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status -> end [fontname="Helvetica", label="Success", weight=5]
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status -> code [fontname="Helvetica", label="Refuse", weight=5]
|
||||
status -> error [fontname="Helvetica", label="Change\ntimeout"]
|
||||
|
||||
code [fontname="Helvetica"]
|
||||
code -> ack [weight=2]
|
||||
|
||||
start_ack [fontname="Helvetica"]
|
||||
start_ack -> ack [fontname="Helvetica", label="Ack only"]
|
||||
|
||||
ack [fontname="Helvetica"]
|
||||
ack -> check_ack [weight=2]
|
||||
|
||||
check_ack [fontname="Helvetica"]
|
||||
check_ack -> end [fontname="Helvetica", label="Ack only"]
|
||||
check_ack -> error [weight=2]
|
||||
|
||||
end [fontname="Helvetica"]
|
||||
|
||||
error [fontname="Helvetica"]
|
||||
}
|
||||
|
|
@ -2,9 +2,6 @@
|
|||
/* $Id$ */
|
||||
|
||||
digraph pdo_conf {
|
||||
size="7,9"
|
||||
center=1
|
||||
ratio=fill
|
||||
|
||||
start [fontname="Helvetica"]
|
||||
start -> action_next_sync [fontname="Helvetica",label="First SM",weight=10]
|
||||
|
|
|
|||
|
|
@ -2,9 +2,6 @@
|
|||
/* $Id$ */
|
||||
|
||||
digraph pdo_entry_conf {
|
||||
size="7,9"
|
||||
center=1
|
||||
ratio=fill
|
||||
|
||||
start [fontname="Helvetica"]
|
||||
start -> zero_entry_count [weight=10]
|
||||
|
|
|
|||
|
|
@ -2,9 +2,6 @@
|
|||
/* $Id$ */
|
||||
|
||||
digraph pdo_entry_read {
|
||||
size="7,9"
|
||||
center=1
|
||||
ratio=fill
|
||||
|
||||
start [fontname="Helvetica"]
|
||||
start -> count [weight=5]
|
||||
|
|
|
|||
|
|
@ -2,9 +2,6 @@
|
|||
/* $Id$ */
|
||||
|
||||
digraph pdo_read {
|
||||
size="7,9"
|
||||
center=1
|
||||
ratio=fill
|
||||
|
||||
start [fontname="Helvetica"]
|
||||
start -> action_next_sync [fontname="Helvetica", label="First SM", weight=5]
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
|
||||
/* $Id$ */
|
||||
|
||||
digraph sii {
|
||||
|
||||
start_reading [fontname="Helvetica"]
|
||||
start_reading -> read_check [weight=5]
|
||||
|
||||
read_check [fontname="Helvetica"]
|
||||
read_check -> error
|
||||
read_check -> read_fetch [weight=5]
|
||||
|
||||
read_fetch [fontname="Helvetica"]
|
||||
read_fetch -> error
|
||||
read_fetch -> end [weight=5]
|
||||
read_fetch -> read_fetch
|
||||
|
||||
start_writing [fontname="Helvetica"]
|
||||
start_writing -> write_check [weight=5]
|
||||
|
||||
write_check [fontname="Helvetica"]
|
||||
write_check -> error
|
||||
write_check -> write_check2 [weight=5]
|
||||
|
||||
write_check2 [fontname="Helvetica"]
|
||||
write_check2 -> error
|
||||
write_check2 -> end [weight=5]
|
||||
write_check2 -> write_check2
|
||||
|
||||
end [fontname="Helvetica"]
|
||||
|
||||
error [fontname="Helvetica"]
|
||||
}
|
||||
|
|
@ -8,10 +8,8 @@ FIGS := \
|
|||
app-config.fig \
|
||||
architecture.fig \
|
||||
fmmus.fig \
|
||||
fsm-change.fig \
|
||||
fsm-coedown.fig \
|
||||
fsm-eoe.fig \
|
||||
fsm-sii.fig \
|
||||
interrupt.fig \
|
||||
master-locks.fig \
|
||||
masters.fig \
|
||||
|
|
|
|||
|
|
@ -1,101 +0,0 @@
|
|||
#FIG 3.2
|
||||
Portrait
|
||||
Center
|
||||
Metric
|
||||
A4
|
||||
100.00
|
||||
Single
|
||||
-2
|
||||
1200 2
|
||||
0 32 #8e8e8e
|
||||
6 398 2378 2122 3112
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 1260 2745 855 360 405 2385 2115 3105
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 960 1260 2790 CODE\001
|
||||
-6
|
||||
6 2513 2378 4237 3112
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 3375 2745 855 360 2520 2385 4230 3105
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 690 3375 2790 ACK\001
|
||||
-6
|
||||
6 4523 2378 6458 3112
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 5490 2745 855 360 4635 2385 6345 3105
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1935 5490 2790 CHECK ACK\001
|
||||
-6
|
||||
6 6705 2340 8505 3150
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 2745 855 360 6750 2385 8460 3105
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 2738 765 322 6840 2416 8370 3060
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1200 7605 2790 ERROR\001
|
||||
-6
|
||||
6 2513 893 4237 1627
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 3375 1260 855 360 2520 900 4230 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1170 3375 1305 CHECK\001
|
||||
-6
|
||||
6 4628 893 6352 1627
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 5490 1260 855 360 4635 900 6345 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1305 5490 1305 STATUS\001
|
||||
-6
|
||||
6 6705 855 8505 1665
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 1260 855 360 6750 900 8460 1620
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 1261 748 315 6857 946 8353 1576
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 705 7605 1305 END\001
|
||||
-6
|
||||
6 360 855 2160 1665
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 1260 1260 855 360 405 900 2115 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1080 1260 1305 START\001
|
||||
-6
|
||||
1 3 0 1 0 0 50 -1 20 0.000 1 0.0000 495 675 101 101 495 675 585 720
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
2115 1260 2520 1260
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
4230 1260 4635 1260
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
6345 1260 6750 1260
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
5670 900 5670 540 5400 540 5355 900
|
||||
0.000 -1.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
2115 2745 2520 2745
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
4230 2745 4635 2745
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
6345 2745 6750 2745
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
4905 1530 4365 1980 2610 2115 1755 2430
|
||||
0.000 -1.000 -1.000 0.000
|
||||
3 2 0 1 0 0 50 -1 20 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
540 765 675 990
|
||||
0.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
4050 1485 4500 1620 6120 1980 6930 2520
|
||||
0.000 -1.000 -1.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
6165 1485 6750 1935 7110 2430
|
||||
0.000 -1.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
3915 3060 5490 3285 6795 2925
|
||||
0.000 -1.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
1890 3015 5355 3510 6975 3015
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
5670 2386 5670 2026 5400 2026 5355 2386
|
||||
0.000 -1.000 -1.000 0.000
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
#FIG 3.2
|
||||
Portrait
|
||||
Center
|
||||
Metric
|
||||
A4
|
||||
100.00
|
||||
Single
|
||||
-2
|
||||
1200 2
|
||||
0 32 #8e8e8e
|
||||
6 2235 893 4515 1627
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 3375 1260 855 360 2520 900 4230 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2280 3375 1305 READ_CHECK\001
|
||||
-6
|
||||
6 4388 893 6593 1627
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 5490 1260 855 360 4635 900 6345 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2205 5490 1305 READ_FETCH\001
|
||||
-6
|
||||
6 165 893 2355 1627
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 1260 1260 855 360 405 900 2115 1620
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2190 1260 1305 READ_START\001
|
||||
-6
|
||||
6 6705 1710 8505 2520
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 2115 855 360 6750 1755 8460 2475
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 7605 2116 748 315 6857 1801 8353 2431
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 705 7605 2160 END\001
|
||||
-6
|
||||
6 113 2648 2408 3382
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 1260 3015 855 360 405 2655 2115 3375
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2295 1260 3060 WRITE_START\001
|
||||
-6
|
||||
6 2183 2648 4568 3382
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 3375 3015 855 360 2520 2655 4230 3375
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2385 3375 3060 WRITE_CHECK\001
|
||||
-6
|
||||
6 4208 2648 6773 3382
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 5490 3015 855 360 4635 2655 6345 3375
|
||||
4 1 0 50 -1 16 12 0.0000 4 150 2565 5490 3060 WRITE_CHECK2\001
|
||||
-6
|
||||
6 3555 1710 5355 2520
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 4455 2115 855 360 3600 1755 5310 2475
|
||||
1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 4455 2108 765 322 3690 1786 5220 2430
|
||||
4 1 0 50 -1 16 12 0.0000 4 120 1200 4455 2160 ERROR\001
|
||||
-6
|
||||
6 360 540 675 990
|
||||
1 3 0 1 0 0 50 -1 20 0.000 1 0.0000 495 675 101 101 495 675 585 720
|
||||
3 2 0 1 0 0 50 -1 20 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
540 765 675 990
|
||||
0.000 0.000
|
||||
-6
|
||||
6 360 2295 675 2745
|
||||
1 3 0 1 0 0 50 -1 20 0.000 1 0.0000 495 2430 101 101 495 2430 585 2475
|
||||
3 2 0 1 0 0 50 -1 20 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
540 2520 675 2745
|
||||
0.000 0.000
|
||||
-6
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
2115 1260 2520 1260
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
4230 1260 4635 1260
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
2115 3015 2520 3015
|
||||
0.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 2
|
||||
1 1 1.00 60.00 120.00
|
||||
4230 3015 4635 3015
|
||||
0.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
3375 1620 3465 1845 3735 1935
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
5490 1620 5445 1845 5220 1935
|
||||
0.000 -1.000 0.000
|
||||
3 2 1 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
3375 2610 3465 2385 3735 2295
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
5490 2610 5445 2385 5220 2295
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
6255 1440 6750 1620 7020 1845
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 4.000 0 1 0 3
|
||||
1 1 1.00 60.00 120.00
|
||||
6210 2835 6750 2700 7020 2385
|
||||
0.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
5670 900 5670 630 5400 630 5400 900
|
||||
0.000 -1.000 -1.000 0.000
|
||||
3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 4
|
||||
1 1 1.00 60.00 120.00
|
||||
5670 3375 5670 3690 5310 3690 5310 3375
|
||||
0.000 -1.000 -1.000 0.000
|
||||
Loading…
Reference in New Issue