e1000 also supporting PCI MSI interrupts.
This commit is contained in:
Florian Pose
parent
0d16910def
commit
2dacf030f0
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@ -3837,7 +3837,11 @@ void ec_poll(struct net_device *netdev)
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adapter->ec_watchdog_jiffies = jiffies;
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}
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#ifdef CONFIG_PCI_MSI
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e1000_intr_msi(0, netdev);
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#else
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e1000_intr(0, netdev);
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#endif
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}
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#ifdef CONFIG_PCI_MSI
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@ -3853,78 +3857,92 @@ irqreturn_t e1000_intr_msi(int irq, void *data)
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struct net_device *netdev = data;
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struct e1000_adapter *adapter = netdev_priv(netdev);
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struct e1000_hw *hw = &adapter->hw;
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#ifndef CONFIG_E1000_NAPI
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int i;
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#ifdef CONFIG_E1000_NAPI
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int ec_work_done = 0;
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#endif
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/* this code avoids the read of ICR but has to get 1000 interrupts
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* at every link change event before it will notice the change */
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if (++adapter->detect_link >= 1000) {
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uint32_t icr = E1000_READ_REG(hw, ICR);
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if (adapter->ecdev) {
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for (i = 0; i < E1000_MAX_INTR; i++)
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#ifdef CONFIG_E1000_NAPI
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/* read ICR disables interrupts using IAM, so keep up with our
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* enable/disable accounting */
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atomic_inc(&adapter->irq_sem);
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring,
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&ec_work_done, 100) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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#else
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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#endif
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adapter->detect_link = 0;
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if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
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(icr & E1000_ICR_INT_ASSERTED)) {
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hw->get_link_status = 1;
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/* 80003ES2LAN workaround--
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* For packet buffer work-around on link down event;
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* disable receives here in the ISR and
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* reset adapter in watchdog
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*/
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if (netif_carrier_ok(netdev) &&
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(adapter->hw.mac_type == e1000_80003es2lan)) {
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/* disable receives */
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uint32_t rctl = E1000_READ_REG(hw, RCTL);
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E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
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}
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/* guard against interrupt when we're going down */
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if (!test_bit(__E1000_DOWN, &adapter->flags))
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mod_timer(&adapter->watchdog_timer,
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jiffies + 1);
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}
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break;
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} else {
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E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
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E1000_ICR_LSC)));
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/* bummer we have to flush here, but things break otherwise as
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* some event appears to be lost or delayed and throughput
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* drops. In almost all tests this flush is un-necessary */
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E1000_WRITE_FLUSH(hw);
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/* this code avoids the read of ICR but has to get 1000 interrupts
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* at every link change event before it will notice the change */
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if (++adapter->detect_link >= 1000) {
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uint32_t icr = E1000_READ_REG(hw, ICR);
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#ifdef CONFIG_E1000_NAPI
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/* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
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* masked. No need for the IMC write, but it does mean we
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* should account for it ASAP. */
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atomic_inc(&adapter->irq_sem);
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/* read ICR disables interrupts using IAM, so keep up with our
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* enable/disable accounting */
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atomic_inc(&adapter->irq_sem);
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#endif
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adapter->detect_link = 0;
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if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
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(icr & E1000_ICR_INT_ASSERTED)) {
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hw->get_link_status = 1;
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/* 80003ES2LAN workaround--
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* For packet buffer work-around on link down event;
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* disable receives here in the ISR and
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* reset adapter in watchdog
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*/
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if (netif_carrier_ok(netdev) &&
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(adapter->hw.mac_type == e1000_80003es2lan)) {
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/* disable receives */
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uint32_t rctl = E1000_READ_REG(hw, RCTL);
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E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
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}
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/* guard against interrupt when we're going down */
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if (!test_bit(__E1000_DOWN, &adapter->flags))
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mod_timer(&adapter->watchdog_timer,
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jiffies + 1);
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}
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} else {
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E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
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E1000_ICR_LSC)));
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/* bummer we have to flush here, but things break otherwise as
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* some event appears to be lost or delayed and throughput
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* drops. In almost all tests this flush is un-necessary */
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E1000_WRITE_FLUSH(hw);
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#ifdef CONFIG_E1000_NAPI
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/* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
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* masked. No need for the IMC write, but it does mean we
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* should account for it ASAP. */
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atomic_inc(&adapter->irq_sem);
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#endif
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}
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#ifdef CONFIG_E1000_NAPI
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if (likely(netif_rx_schedule_prep(netdev))) {
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adapter->total_tx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_rx_packets = 0;
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__netif_rx_schedule(netdev);
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} else
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e1000_irq_enable(adapter);
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#else
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adapter->total_tx_bytes = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_packets = 0;
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for (i = 0; i < E1000_MAX_INTR; i++)
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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break;
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if (likely(adapter->itr_setting & 3))
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e1000_set_itr(adapter);
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#endif
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}
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#ifdef CONFIG_E1000_NAPI
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if (likely(netif_rx_schedule_prep(netdev))) {
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adapter->total_tx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_rx_packets = 0;
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__netif_rx_schedule(netdev);
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} else
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e1000_irq_enable(adapter);
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#else
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adapter->total_tx_bytes = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_packets = 0;
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for (i = 0; i < E1000_MAX_INTR; i++)
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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break;
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if (likely(adapter->itr_setting & 3))
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e1000_set_itr(adapter);
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#endif
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return IRQ_HANDLED;
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}
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#endif
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@ -3942,8 +3960,9 @@ e1000_intr(int irq, void *data)
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struct e1000_adapter *adapter = netdev_priv(netdev);
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struct e1000_hw *hw = &adapter->hw;
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uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
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#ifndef CONFIG_E1000_NAPI
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int i;
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#ifdef CONFIG_E1000_NAPI
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int ec_work_done = 0;
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#endif
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if (unlikely(!icr))
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return IRQ_NONE; /* Not our interrupt */
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@ -3981,8 +4000,19 @@ e1000_intr(int irq, void *data)
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mod_timer(&adapter->watchdog_timer, jiffies + 1);
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}
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if (adapter->ecdev) {
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for (i = 0; i < E1000_MAX_INTR; i++)
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#ifdef CONFIG_E1000_NAPI
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring,
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&ec_work_done, 100) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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#else
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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#endif
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break;
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} else {
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#ifdef CONFIG_E1000_NAPI
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if (!adapter->ecdev) {
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if (unlikely(hw->mac_type < e1000_82571)) {
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/* disable interrupts, without the synchronize_irq bit */
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atomic_inc(&adapter->irq_sem);
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@ -3999,43 +4029,40 @@ e1000_intr(int irq, void *data)
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/* this really should not happen! if it does it is basically a
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* bug, but not a hard error, so enable ints and continue */
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e1000_irq_enable(adapter);
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}
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#else
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/* Writing IMC and IMS is needed for 82547.
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* Due to Hub Link bus being occupied, an interrupt
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* de-assertion message is not able to be sent.
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* When an interrupt assertion message is generated later,
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* two messages are re-ordered and sent out.
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* That causes APIC to think 82547 is in de-assertion
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* state, while 82547 is in assertion state, resulting
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* in dead lock. Writing IMC forces 82547 into
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* de-assertion state.
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*/
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if (!adapter->ecdev &&
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(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)) {
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atomic_inc(&adapter->irq_sem);
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E1000_WRITE_REG(hw, IMC, ~0);
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}
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/* Writing IMC and IMS is needed for 82547.
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* Due to Hub Link bus being occupied, an interrupt
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* de-assertion message is not able to be sent.
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* When an interrupt assertion message is generated later,
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* two messages are re-ordered and sent out.
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* That causes APIC to think 82547 is in de-assertion
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* state, while 82547 is in assertion state, resulting
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* in dead lock. Writing IMC forces 82547 into
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* de-assertion state.
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*/
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if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
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atomic_inc(&adapter->irq_sem);
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E1000_WRITE_REG(hw, IMC, ~0);
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}
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adapter->total_tx_bytes = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_packets = 0;
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adapter->total_tx_bytes = 0;
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adapter->total_rx_bytes = 0;
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adapter->total_tx_packets = 0;
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adapter->total_rx_packets = 0;
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for (i = 0; i < E1000_MAX_INTR; i++)
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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break;
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for (i = 0; i < E1000_MAX_INTR; i++)
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if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
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!e1000_clean_tx_irq(adapter, adapter->tx_ring)))
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break;
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if (!adapter->ecdev) {
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if (likely(adapter->itr_setting & 3))
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e1000_set_itr(adapter);
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if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
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e1000_irq_enable(adapter);
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}
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#endif
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}
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return IRQ_HANDLED;
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}
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