FIXME, TODO; typos.
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@ -398,12 +398,12 @@ application that can provide a bus configuration and exchange process data.
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%------------------------------------------------------------------------------
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\section{General Behavior} % FIXME
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\section{General Behavior}
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\index{Master behavior}
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\ldots
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% Behavior (Scanning) TODO
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% TODO Behavior (Scanning)
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%------------------------------------------------------------------------------
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@ -561,15 +561,17 @@ physical memory to logical process data images.
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\label{chap:api}
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\index{Application interface}
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% Interface version
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% Master Requesting and Releasing
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% Master Locking
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% Configuring Pdo assignment and mapping
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% Domains (memory)
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% Pdo entry registration
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% Sdo configuration
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% Sdo access
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% VoE handlers
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% TODO
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%
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% Interface version
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% Master Requesting and Releasing
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% Master Locking
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% Configuring Pdo assignment and mapping
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% Domains (memory)
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% Pdo entry registration
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% Sdo configuration
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% Sdo access
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% VoE handlers
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The application interface provides functions and data structures for
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applications to access an EtherCAT master. The complete documentation of the
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@ -701,8 +703,10 @@ calculate the process data image and apply the bus configuration for the first
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time. After activation, the application is in charge to send and receive
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frames.
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% TODO PDOS endianess
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% TODO Datagram injection
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% TODO
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%
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% PDO endianess
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% Datagram injection
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%------------------------------------------------------------------------------
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@ -828,8 +832,8 @@ in any case:
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to be started, for example after a command \lstinline+ip link set ethX up+
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from userspace. Frame reception has to be enabled by the driver.
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\item[\usebox\boxstop] The purpose of this callback is to ``close'' the device,
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i.~e. make the hardware stop receiving frames.
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\item[\usebox\boxstop] The purpose of this callback is to ``close'' the
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device, i.~e. make the hardware stop receiving frames.
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\item[\usebox\boxxmit] This function is called for each frame that has to be
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transmitted. The network stack passes the frame as a pointer to an
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@ -1884,7 +1888,7 @@ application-layer state is automatically set to OP.
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The CANopen-over-EtherCAT protocol \cite[sec.~5.6]{alspec} is used to
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configure slaves and exchange data objects on application level.
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% FIXME
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% TODO
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%
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% Download / Upload
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% Expedited / Normal
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@ -2015,7 +2019,7 @@ to make all that possible.
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\section{Command-line Tool}
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\label{sec:tool}
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% --master
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% TODO --master
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\subsection{Character Devices}
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\label{sec:cdev}
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@ -2499,22 +2503,24 @@ in sec.~\ref{sec:timing-bus}.
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\label{sec:timing-bus}
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\index{Bus cycle}
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For measuring the time, a frame is ``on the wire'', two timestamps
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must be be taken:
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For measuring the time, a frame is ``on the wire'', two timestamps must be
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taken:
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\begin{enumerate}
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\item The time, the Ethernet hardware begins with physically sending
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the frame.
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\item The time, the frame is completely received by the Ethernet
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hardware.
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\item The time, the Ethernet hardware begins with physically sending the
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frame.
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\item The time, the frame is completely received by the Ethernet hardware.
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\end{enumerate}
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Both times are difficult to determine. The first reason is, that the
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interrupts are disabled and the master is not notified, when a frame
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is sent or received (polling would distort the results). The second
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reason is, that even with interrupts enabled, the time from the event
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to the notification is unknown. Therefore the only way to confidently
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determine the bus cycle time is an electrical measuring.
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interrupts are disabled and the master is not notified, when a frame is sent
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or received (polling would distort the results). The second reason is, that
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even with interrupts enabled, the time from the event to the notification is
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unknown. Therefore the only way to confidently determine the bus cycle time is
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an electrical measuring.
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Anyway, the bus cycle time is an important factor when designing realtime
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code, because it limits the maximum frequency for the cyclic task of the
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@ -2523,24 +2529,24 @@ hardware and often a trial and error method must be used to determine the
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limits of the system.
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The central question is: What happens, if the cycle frequency is too high? The
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answer is, that the EtherCAT frames that have been sent at the end of the cycle
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are not yet received, when the next cycle starts. First this is noticed by
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\textit{ecrt\_domain\_process()}, because the working counter of the process
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data datagrams were not increased. The function will notify the user via
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Syslog\footnote{To limit Syslog output, a mechanism has been implemented, that
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outputs a summarized notification at maximum once a second.}. In this case, the
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process data keeps being the same as in the last cycle, because it is not
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erased by the domain. When the domain datagrams are queued again, the master
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notices, that they are already queued (and marked as sent). The master will
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mark them as unsent again and output a warning, that datagrams were
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answer is, that the EtherCAT frames that have been sent at the end of the
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cycle are not yet received, when the next cycle starts. First this is noticed
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by \textit{ecrt\_domain\_process()}, because the working counter of the
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process data datagrams were not increased. The function will notify the user
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via Syslog\footnote{To limit Syslog output, a mechanism has been implemented,
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that outputs a summarized notification at maximum once a second.}. In this
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case, the process data keeps being the same as in the last cycle, because it
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is not erased by the domain. When the domain datagrams are queued again, the
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master notices, that they are already queued (and marked as sent). The master
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will mark them as unsent again and output a warning, that datagrams were
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``skipped''.
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On the mentioned \unit{2.0}{\giga\hertz} system, the possible cycle frequency
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can be up to \unit{25}{\kilo\hertz} without skipped frames. This value can
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surely be increased by choosing faster hardware. Especially the RealTek network
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hardware could be replaced by a faster one. Besides, implementing a dedicated
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ISR for EtherCAT devices would also contribute to increasing the latency. These
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are two points on the author's to-do list.
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surely be increased by choosing faster hardware. Especially the RealTek
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network hardware could be replaced by a faster one. Besides, implementing a
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dedicated ISR for EtherCAT devices would also contribute to increasing the
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latency. These are two points on the author's to-do list.
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%------------------------------------------------------------------------------
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@ -2685,8 +2691,8 @@ Ethernet device to use (or \lstinline+ff:ff:ff:ff:ff:ff+ to use the first
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device offered) and selecting the driver(s) to load via the
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\lstinline+DEVICE_MODULES+ variable.
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After the basic configuration is done, the master can be started with
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the below command:
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After the basic configuration is done, the master can be started with the
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below command:
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\begin{lstlisting}
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# `\textbf{/etc/init.d/ethercat start}`
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